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NI SCXI-1326电流输出模块

作者:xqt 发布时间:2022-07-06 13:37:06 次浏览

NI SCXI-1326电流输出模块,SCXI-1326产品颜色IP总线时钟头(J11)J11选择IP总线时钟的速度。IP总线时钟速度可能为8MHz或本地总线时钟的速度(MC68060为30MHz,MC68LC060为32MHz)。默认出厂配置具有J11引脚1和2上安装的跳线,表示8MHz时钟。如果跨接导线安装在J11针脚2和3之间,则IP总线时钟速度与MC68060或MC68LC060总线时钟的

NI SCXI-1326电流输出模块,SCXI-1326产品颜色

IP总线时钟头(J11)J11选择IP总线时钟的速度。IP总线时钟速度可能为8MHz或本地总线时钟的速度(MC68060为30MHz,MC68LC060为32MHz)。默认出厂配置具有J11引脚1和2上安装的跳线,表示8MHz时钟。如果跨接导线安装在J11针脚2和3之间,则IP总线时钟速度与MC68060或MC68LC060总线时钟的速度匹配(30/32MHz),从而允许IP模块与30/32MHz MPU一起运行。

SCXI-1326 -2.jpg

SCXI-1326 -1.jpg

NI SCXI-1326电流输出模块无论设置是8MHz还是30/32MHz,所有IP端口都在同一个RAM备用电源选择标头(J14)上运行收割台J14确定车载静态RAM备用电源的来源在MVME172LX上。以下备用电源配置可用于车载SRAM通过收割台J14。在工厂配置中,VMEbus+5V备用电压作为一次和二次电源车载电池已断开)。速度IP总线选通选择标题(J18)一些IP总线实现使用选通∗ 信号(针脚46)组件从IP2芯片到IP模块的输入。其他IP接口需要闸门应断开。在J18针脚1和2之间安装跨接导线后,可编程频率源连接至选通管∗ IP总线上的信号。提到MVME172嵌入式控制器中的IP2芯片编程部分其他信息的程序员参考指南。如果从J18上拆下跨接导线,则选通线可用于IP模块之间的边带消息类型。闪光灯∗ 信号不是连接到板上的任何活动设备,但它可能连接到上拉电阻器。IP DMA侦听跳线(J19)J19定义了当IP DMA控制器是本地总线主控。J19针脚1和2启用/禁用Snoop控制MC68060处理器上的信号(引脚3-4在MVME172LX板)对于MVME172LX,短路引脚1-2可实现监听。留下别针1-2断开连接(出厂配置)禁止窥探。具有

启用侦听后,将驱动发送至MC68060处理器的侦听信号在IP DMA操作期间为低。

IP Bus Clock Header (J11)

J11 selects the speed of the IP bus clock. The IP bus clock speed may be

either 8MHz or the speed of the local bus clock (30MHz for the MC68060,

32MHz for the MC68LC060). The default factory configuration has a

jumper installed on J11 pins 1 and 2, denoting an 8MHz clock.

If the jumper is installed on J11 between pins 2 and 3, the IP bus clock

speed matches that of the MC68060 or MC68LC060 bus clock

(30/32MHz), thus allowing the IP module to run with a 30/32MHz MPU.

Whether the setting is 8MHz or 30/32MHz, all IP ports operate at the sameSRAM Backup Power Source Select Header (J14)

Header J14 determines the source for onboard static RAM backup power

on the MVME172LX.

The following backup power configurations are available for onboard

SRAM through header J14. In the factory configuration, the VMEbus +5V

standby voltage serves as primary and secondary power source (the

onboard battery is disconnected).

speed.IP Bus Strobe Select Header (J18)

Some IP bus implementations make use of the Strobe∗ signal (pin 46) as

an input to the IP modules from the IP2 chip. Other IP interfaces require

that the strobe be disconnected.

With a jumper installed between J18 pins 1 and 2, a programmable

frequency source is connected to the Strobe∗ signal on the IP bus. Refer to

the IP2 chip programming section in the MVME172 Embedded Controller

Programmer’s Reference Guide for additional information.

If the jumper is removed from J18, the strobe line is available for a

sideband type of messaging between IP modules. The Strobe∗ signal is not

connected to any active devices on the board, but it may be connected to a

pull-up resistor.IP DMA Snoop Jumper (J19)

J19 defines the state of the snoop control bus when an IP DMA controller

is local bus master. J19 pins 1 and 2 enable/disable the Snoop Control

signal on the MC68060 processor (pins 3-4 have no function on

MVME172LX boards)For the MVME172LX, shorting pins 1-2 enables snooping. Leaving pins

1-2 disconnected (the factory configuration) inhibits snooping. With

snooping enabled, the snoop signal to the MC68060 processor is driven

low during IP DMA operations.


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