TB820-2V2 3BSE013209R1端子模块，ABB使用方法教程
当位被设置为驱动一条IRQ线时，它们不得更改。这三个位可以更改只有当它们全部清除时，才意味着先前的中断请求已得到服务。通过设置IACKEN提供的附加功能（请参阅至本文件中的实用程序中断掩码寄存器部分第章）由VMEchip提供，用于向本地处理器在中断请求（生成）时已在VMEbus。该寄存器允许MC68030确定VMEchip标记的总线错误条件的原因。
TB820-2V2 3BSE013209R1端子模块读取寄存器会将其所有位清除为0.总线错误状态寄存器仅设计为指出最新总线错误情况的原因（即。，当有理由设置任何位时，所有其他位已清除）。该寄存器允许软件设置VMEbus监控器短输入/输出中的GCSR寄存器集地图该寄存器位0-3中包含的值配置GCSR基址的第4-7位。地址线A08-A15固定为0美元。参见表4-9。VMEbus的位1-3地址选择GCSR中的特定寄存器。这些位因此，除非另有说明，否则由SYSRESET设置为1编程后，GCSR集合不响应VMEbus访问。当GCSR映射为不响应VMEbus访问。对于示例：位置监视器SIGHP和SIGLP。这些位为VMEchip。VMEchip显示的硬连线ID为%0001。位4位置监视器0配置为监视双字节访问主管短输入/输出地址$00F0，单字节访问短输入/输出地址$00F1。清除后，LM0表示对地址$00F0或$00F1的访问是检测。此时，请求实用程序中断级别2（如果中断已启用）。当中断为已确认或软件向其写入1时。该位设置为1通过SYSRESET。见以下注释。
When the bits are set to drive one of the IRQ lines, they
must not be changed. The three bits may be changed
only when they are all cleared, signifying that the
previous interrupt request has been serviced.
An added function provided by setting IACKEN (refer
to the Utility Interrupt Mask Register section in this
chapter) is provided by the VMEchip to signal the local
processor when the interrupt request (generated
through this register) has been acknowledged on the
VMEbus. This register allows the MC68030 to determine the
cause of a bus error condition flagged by the VMEchip.
Reading the register causes all of its bits to be cleared to
0. The bus error status register is designed to only
indicate the cause of the latest bus error condition (i.e.,
when there is cause to set any of the bits, all other bits
are cleared). This register allows software to set the base address of the
GCSR set of registers in the VMEbus supervisor short I/O
map.
The value contained in bits 0-3 of this register configures
bits 4-7 of the GCSR base address. Address lines A08-A15
are fixed at $0. Refer to Table 4-9. Bits 1-3 of the VMEbus
address select the specific registers in the GCSR. These bits
are set to 1 by SYSRESET, therefore, unless otherwise
programmed, the GCSR set does not respond to VMEbus
accesses. GCSR functions are not enabled when the GCSR
is mapped not to respond to VMEbus accesses. For
example: location monitors SIGHP and SIGLP. These bits provide a unique identification number for the
VMEchip. The VMEchip presents a hardwired ID of %0001.
Bit 4 Location monitor 0 is configured to monitor double-byte
accesses to the supervisor short I/O address $00F0, and singlebyte accesses to the short I/O address $00F1. When cleared,
LM0 indicates that an access to address $00F0 or $00F1 was
detected. At such a time, utility interrupt level 2 is requested (if
the interrupt is enabled). LM0 is set when the interrupt is
acknowledged or when software writes a 1 to it. This bit is set to
1 by SYSRESET. See Note below.
