PCD230A 3BHE022291R0101控制卡件,ABB配置教程
RWD位允许软件配置请求者版本模式设置位时，如果RNEVER和DWB都是清除为0时，请求者在MC68030完成VMEbus循环。当位被清除时，如果RNEVER和DWB都被清除为0，请求者操作在请求发布（ROR）模式下。获得控制权后在VMEbus中，它保持控制，直到检测到另一个请求在VMEbus上挂起。该位通过任何重置清除。位5 RONR位控制VMEchip的方式请求VMEbus。当设置位时；任何时候MVME147拥有总线主控权
PCD230A 3BHE022291R0101控制卡件，然后放弃了VMEchip在检测到总线之前，不会再次请求VMEbus请求信号BR*在其电平上被否定至少150纳秒。当VMEchip检测到BR*否定时，它会抑制再次驾驶至少200 ns。该位通过任何重置清除。位6当MVME147为VMEbus主机时，DHB状态位为1否则为0。位7将DWB控制位设置为1会导致VMEchip请求
VMEbus（如果还没有总线主控）。当VMEbus主控权已经获得，直到之后才放弃DWB和RNEVER位均被清除。此位已清除通过任何重置。设置MASD16位迫使MVME147仅执行VMEbus上的D8和D16数据传输。清除MASD16位允许在当MC68030在以下范围内访问时的VMEbus$F0000000。（对高于$F0000000的VMEbus位置的访问是无论MASD16位如何，始终限制为D8/D16。）该位由SYSRESET清除。位1，如果设置了MASA24位，或MC68030访问VMEbus在低于1000000美元的范围内，主驱动器驱动其中一个VMEbus期间的标准（24位）地址修饰符代码周期（除非主机配置为使用主机地址主地址修饰符中描述的修饰符寄存器本章注册部分）。具体标准AM代码由MC68030在循环期间的三个功能代码行，如表所示在下面该位由SYSRESET清除。位2，如果设置了MASA16位，或MC68030访问高于$FFFF0000的VMEbus，短（16位）AM无论MASA24位的状态如何（除非主机配置为使用主机地址修饰符寄存器如主地址修改器寄存器中所述本章第节）。具体的短AM代码为根据MC68030在循环期间有三个功能代码行，如下表。该位由SYSRESET清除。
The RWD bit allows software to configure the requester release
mode. When the bit is set, if RNEVER and DWB are both
cleared to 0, the requester releases the VMEbus after the
MC68030 completes a VMEbus cycle. When the bit is cleared, if
RNEVER and DWB are both cleared to 0, the requester operates
in the Release-On-Request (ROR) mode. After acquiring control
of the VMEbus, it maintains control until it detects another
request pending on the VMEbus. This bit is cleared by any reset.
Bit 5 The RONR bit controls the manner in which the VMEchip
requests the VMEbus. When the bit is set; anytime the
MVME147 has bus mastership, then gives it up, the VMEchip
does not request the VMEbus again until it detects the bus
request signal BR*, on its level, negated for at least 150 ns.
When the VMEchip detects BR* negated, it refrains from
driving it again for at least 200 ns.
This bit is cleared by any reset.
Bit 6 The DHB status bit is 1 when the MVME147 is VMEbus master
and 0 when it is not.
Bit 7 Setting the DWB control bit to 1 causes the VMEchip to request
the VMEbus (if not already bus master). When VMEbus
mastership has been obtained, it is not relinquished until after
the DWB and RNEVER bits are both cleared. This bit is cleared
by any reset.Setting the MASD16 bit forces the MVME147 to perform only
D8 and D16 data transfers on the VMEbus. Clearing the
MASD16 bit allows D8, D16, and D32 transfer capability on the
VMEbus when the MC68030 accesses in the range below
$F0000000. (Accesses to VMEbus locations above $F0000000 are
always restricted to D8/D16 regardless of the MASD16 bit.)
This bit is cleared by SYSRESET.
Bit 1 If either the MASA24 bit is set, or the MC68030 accesses the
VMEbus in the range below $1000000, the master drives one of
the standard (24-bit) address modifier codes during VMEbus
cycles (unless the master is configured to use the master address
modifier register as described in the Master Address Modifier
Register section in this chapter). The specific standard AM code
is determined from the levels that the MC68030 drives on the
three function code lines during the cycle, as shown in the table
below. This bit is cleared by SYSRESET.
