VMIVME-7807自动化卡件，GE使用方法教程

位设置和清除指令不应用于此控制寄存器。因为中断被将1写入状态位，状态位为1至指示挂起的中断，读-修改-写序列可能清除挂起的中断。这些位对滴答定时器生成的中断电平进行编程。这些位编程打印机生成的中断级别。级别0不生成中断。这些位通过重置。位3当该位为高位时，中断被启用。中断是此位低时禁用。该位通过重置清除。

VMIVME-7807自动化卡件位4当该位较低时，ACK*的上升沿生成一个打断当该位较高时，ACK的下降沿*生成中断。该位通过重置清除。位5当中断被启用时，该位由上升或由第4位选择的ACK*下降沿。这个钻头是边缘敏感，通过向其写入1或在打印机时清除中断被禁用。位6当中断被启用时，该位由故障*。该位对边缘敏感，通过写入1清除或当打印机中断被禁用时。位7当该位高时，打印机中断在以位0-2编程的电平。该位是位5和的或6、该位通过复位清除。由于级别0不生成中断，因此该级别为用于轮询软件。这些位通过重置清除。位3当该位为高位时，中断被启用。中断是此位低时禁用。该位通过重置清除。位7当该位为高位时，在以位0-2编程的电平。该位是边缘敏感的，并且当中断发生时，由计时计时器执行设置启用。当向其写入1或当中断被禁用。清除后，它将保持清除状态，直到下一步执行。该位通过重置清除。

Bit set and clear instructions should not be used on this

control register. Because the interrupt is cleared by

writing a 1 to the status bit and the status bit is a 1 to

indicate a pending interrupt, the read-modify-write

sequence may clear a pending interrupt. These bits program the interrupt level the tick timer generates.These bits program the interrupt level the printer generates.

Level 0 does not generate an interrupt. These bits are cleared by

reset.

Bit 3 When this bit is high, the interrupt is enabled. The interrupt is

disabled when this bit is low. This bit is cleared by reset.

Bit 4 When this bit is low, the rising edge of ACK* generates an

interrupt. When this bit is high, the falling edge of ACK*

generates an interrupt. This bit is cleared by reset.

Bit 5 When interrupts are enabled, this bit is set by the rising or

falling edge of ACK* as selected by bit 4. This bit is edge

sensitive and is cleared by writing a 1 to it or when printer

interrupts are disabled.

Bit 6 When interrupts are enabled, this bit is set by the falling edge of

FAULT*. This bit is edge sensitive and is cleared by writing a 1

to it or when printer interrupts are disabled.

Bit 7 When this bit is high, a printer interrupt is being generated at

the level programmed in bits 0-2. This bit is the OR of bits 5 and

6. This bit is cleared by reset. 

Because level 0 does not generate an interrupt, this level is

intended for polling software. These bits are cleared by reset.

Bit 3 When this bit is high, the interrupt is enabled. The interrupt is

disabled when this bit is low. This bit is cleared by reset.

Bit 7 When this bit is high, a tick timer interrupt is being generated at

the level programmed in bits 0-2. This bit is edge sensitive and it

is set by a carry out of the tick timer when interrupts are

enabled. This bit is cleared when a 1 is written to it or when the

interrupt is disabled. When cleared, it remains cleared until the

next carry out. This bit is cleared by reset.