IOR810 P-HB-IOR-80010000自动化模块，ABB说明书在线阅读

数据总线结构MVME147上的数据总线结构安排为容纳8位、16位、32位和16/32位端口居住在董事会上。8位端口连接到本地总线，16位端口连接到本地总线的D16-D32和32位端口连接到本地总线的D00-D32。电池备份的RAM和时钟SGS Thompson M48T18 RAM和时钟芯片用于MVME147。该芯片提供时钟、振荡器、，电源故障检测、内存写保护和8184字节的内存然而，只有4088字节的RAM可在MVME147。

IOR810 P-HB-IOR-80010000自动化模块将电池和水晶插头插入M48T18。有2040字节的RAM可用。任何程序写入以在高于TOD时钟在早期版本上不起作用MVME147。

内部电池的典型寿命为3至5年时钟正在运行，如果时钟没有运行，则至少运行10年已投入运行。注意：时钟是在省电的情况下从工厂发货的模式ROM/PROM/EPROM/EEPROM上有四个32针ROM/PROM/EPROM/EEPROM插槽MVME147。它们被组织为两个银行，每个银行有两个插座银行这些组被配置为MPU的字端口。每家银行可以分别配置为8K x 8、16K x 8、32K x 8、64K x 8、128Kx 8、256K x 8、512K x 8或1M x 8 ROM/PROM/EPROM设备或2K x 8、8K x 8或32K x 8 EEPROM设备。有几种不同的擦除/写入算法EEPROM设备取决于制造商。MVME147仅支持静态RAM兼容的设备擦除/写入机制，如Xicor X28256或X2864H。设备定时要求

ROM/PROM/EPROM/EEPROM设备必须满足计时如图5-2所示。

ROM/PROM/EPROM/EEPROM设备保证

Data Bus Structure

The data bus structure on the MVME147 is arranged to

accommodate the 8-bit, 16-bit, 32-bit, and 16/32-bit ports that

reside on the board. The 8-bit ports are connected to D24-D32 of the

local bus, 16-bit ports are connected to D16- D32 of the local bus and

32-bit ports are connected to D00-D32 of the local bus.

Battery Backed Up RAM and Clock

The SGS-Thompson M48T18 RAM and clock chip is used on the

MVME147. This chip provides a time-of-day clock, oscillator,

power fail detection, memory write protection, and 8184 bytes of

RAM. However, only 4088 bytes of RAM are accessible on the

MVME147. The battery and crystal plug into the M48T18.

have 2040 bytes of RAM available. Any programs

written to use RAM in the address range above the

TOD clock will not work on an earlier version

MVME147.

The internal battery has a typical life span of 3 to 5 years when the

clock is running and a minimum of 10 years when the clock has not

been put in operation.

Note The clock is shipped from the factory in the power-save

mode.

ROM/PROM/EPROM/EEPROM

There are four 32-pin ROM/PROM/EPROM/EEPROM sockets on

the MVME147. They are organized as 2 banks with two sockets per

bank.

The banks are configured as word ports to the MPU. Each bank can

be separately configured for 8K x 8, 16K x 8, 32K x 8, 64K x 8, 128K

x 8, 256K x 8, 512K x 8, or 1M x 8 ROM/PROM/EPROM devices or

2K x 8, 8K x 8, or 32K x 8 EEPROM devices.

There are several different algorithms for erasing/writing to

EEPROM devices depending on the manufacturer. The MVME147

supports only those devices which have a static RAM compatible

erase/write mechanism such as the Xicor X28256 or X2864H.

Device Timing Requirements

The ROM/PROM/EPROM/EEPROM devices must meet the

timings shown in Figure 5-2.

The ROM/PROM/EPROM/ EEPROM devices are guaranteed the