UFC921A101 3BHE024855R0101电源模块，ABB怎么使用

VMEbus主界面由VMEchip提供。根据VMEbus地址，MVME147主机接口可以是A32/D32、A24/D16或A16/D16。当MC68030需要VMEbus进行读、写、读-修改-写、，或中断确认周期，它请求VMEchip获取公共汽车主控权。VMEchip请求总线，并在收到mastership，它根据

MC68030。当从机响应时，VMEchip会传递此消息信息发送至MC68030。

UFC921A101 3BHE024855R0101电源模块VMEbus请求者VMEbus请求者用于获取和放弃主控权VMEbus的。其操作受可编程软件的影响VMEchip中的位。请求者在编程的当电路板不是当前VMEbus主电路板并且是以下之一时的电平发生以下情况：❏ MC68030执行绑定的程序空间周期对于VMEbus。❏ MC68030执行一个数据空间周期，该周期为VMEbus。❏ MC68030执行一个IACK循环，该循环为VMEbus。

❏ MC68030设置VMEchip中的DWB位。❏ MC68030执行“多地址RMC”循环为本地DRAM绑定，WAITRMC位设置在PCC。请求VMEbus主控权也受中的RONR位影响VMEchip LCSR。只要其中一个满足以下条件：❏ MC68030正在执行VMEbus循环。❏ RWD位在VMEchip中被清除，没有其他VMEbus主机正在激活总线请求。❏ RNEVER位在VMEchip中设置。❏ DWB位在VMEchip中设置。❏ MC68030正在对VMEbus。

❏ MC68030正在完成从中开始的RMC序列

本地DRAM，同时在PCC中设置WAITRMC位。

The VMEbus master interface is provided by the VMEchip.

Depending on the VMEbus address, the MVME147 master

interface may be A32/D32, A24/D16, or A16/D16. When the

MC68030 needs the VMEbus for a read, write, read-modify- write,

or interrupt acknowledge cycle, it requests the VMEchip to obtain

bus mastership. The VMEchip requests the bus and after it receives

mastership, it activates the VMEbus signals as requested by the

MC68030. When the slave responds, the VMEchip passes this

information to the MC68030.VMEbus Requester

The VMEbus requester is used to obtain and relinquish mastership

of the VMEbus. Its operation is affected by software programmable

bits in the VMEchip.

The requester requests VMEbus mastership at the programmed

level when the board is not the current VMEbus master and one of

the following happens:

❏ The MC68030 executes a program space cycle that is bound

for the VMEbus.

❏ The MC68030 executes a data space cycle that is bound for the

VMEbus.

❏ The MC68030 executes an IACK cycle that is bound for the

VMEbus.

❏ The MC68030 sets the DWB bit in the VMEchip.

❏ The MC68030 executes a “multiple address RMC” cycle that

is bound for the local DRAM and the WAITRMC bit is set in

the PCC.

Requesting VMEbus mastership is also affected by the RONR bit in

the VMEchip LCSR. The requester maintains VMEbus mastership as long as one of the

following conditions is met:

❏ The MC68030 is executing a VMEbus cycle.

❏ The RWD bit is cleared in the VMEchip and no other VMEbus

master is activating a bus request.

❏ The RNEVER bit is set in the VMEchip.

❏ The DWB bit is set in the VMEchip.

❏ The MC68030 is performing an RMC sequence to the

VMEbus.

❏ The MC68030 is finishing an RMC sequence that started in

local DRAM while the WAITRMC bit was set in the PCC.