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HONEYWELL 51202329-606连接电缆

作者:xqt 发布时间:2022-07-06 10:25:25 次浏览

HONEYWELL 51202329-606连接电缆,51202329-606中文PDF用户手册数据总线结构MVME162上的本地数据总线是基于在MC68040总线上,支持突发传输和侦听。这个各种本地总线主设备和从设备使用本地总线进行通信。本地总线由优先级类型仲裁器和本地总线的优先级进行仲裁总线主机从高到低依次为:82596CA LAN、NCR 53C710 SCSI、,VMEbus和MPU。一般

HONEYWELL 51202329-606连接电缆,51202329-606中文PDF用户手册

数据总线结构MVME162上的本地数据总线是基于在MC68040总线上,支持突发传输和侦听。这个各种本地总线主设备和从设备使用本地总线进行通信。本地总线由优先级类型仲裁器和本地总线的优先级进行仲裁总线主机从高到低依次为:82596CA LAN、NCR 53C710 SCSI、,VMEbus和MPU。一般来说,任何主设备都可以访问任何从设备;

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HONEYWELL 51202329-606连接电缆然而,并非所有组合都通过了常识测试。请参阅MVME162嵌入式控制器程序员参考指南和用户的每个设备确定其端口大小、数据总线连接和任何访问设备时适用的限制。MC68040/MC68LC040微处理器MVME162配备MC68040或MC68LC040微处理器。MC68040/MC68LC040具有片上指令和数据缓存;这个MC68040还提供浮点协处理器。参见M68040微处理器用户手册了解更多信息。EPROM和闪存MVME162实现包括四个2-Mbit闪存设备在256Kbit x 8配置中。EPROM位置为标准JEDEC 32-引脚PLCC能够达到4Mbit密度(128 Kbit x 8;256 Kbit x 8;512 Kbit x 8;1 Mbit x8)组织为512Kbit x 8设备。跳线设置(GPIO3,引脚9-J22上的10)允许从闪存(GPIO3)中提取重置代码安装)或从EPROM(GPIO3已卸下)。SRAMMVME162在单个内存中提供512KB的32位宽板载静态RAM具有车载电池备份的非交错架构。最坏的情况电池保护所用时间为200天。SRAM的详细信息性能可在中的SRAM内存控制器部分中找到MVME162嵌入式控制器中的MCchip编程模型程序员参考指南。SRAM阵列没有奇偶校验保护。MVME162 SRAM的电池备份功能由Dallas提供DS1210S支持主电源和辅助电源的设备。在如果主板电源出现故障,DS1210将检查电源和切换到电压较高的电源。如果备用电源的电压低于两伏,则DS1210会阻塞第二个存储周期;这使软件能够向避免数据丢失。因为第二次访问可能会在通电期间被阻止失败时,软件应在依赖数据之前至少进行两次访问。MVME162提供跳线(在J20上),允许DS1210通过引脚连接到VMEbus+5V STDB或连接到车载电池。例如,主系统备份源可能是蓄电池通过引脚和二次电源连接到VMEbus+5V STDB可能是车载电池。如果系统电源出现故障或电路板从机箱中卸下后,车载电池将接管。

MC68040/MC68LC040 MPU The MVME162 is equipped with an MC68040 or MC68LC040 microprocessor. The MC68040/MC68LC040 have on-chip instruction and data caches; the MC68040 also provides a floating-point coprocessor. Refer to the M68040 Microprocessor User’s Manual for more information. EPROM and Flash Memory The MVME162 implementation includes four 2-Mbit Flash devices organized in a 256Kbit x 8 configuration. The EPROM location is a standard JEDEC 32- pin PLCC capable of 4 Mbit densities (128 Kbit x 8; 256 Kbit X 8; 512 Kbit x 8; 1 Mbit x8) organized as a 512Kbit x 8 device. A jumper setting (GPIO3, pins 9- 10 on J22) allows reset code to be fetched either from Flash memory (GPIO3 installed) or from the EPROM (GPIO3 removed). SRAM The MVME162 provides 512KB of 32-bit-wide onboard static RAM in a single non-interleaved architecture with onboard battery backup. The worst case elapsed time for battery protection is 200 days. Specifics on SRAM performance can be found in the section on the SRAM Memory Controller in the MCchip Programming Model in the MVME162 Embedded Controller Programmer’s Reference Guide. The SRAM arrays are not parity protected. The battery backup function for the MVME162 SRAM is provided by a Dallas DS1210S device that supports primary and secondary power sources. In the event of a main board power failure, the DS1210S checks power sources and switches to the source with the higher voltage. If the voltage of the backup source is lower than two volts, the DS1210S blocks the second memory cycle; this allows software to provide an early warning to avoid data loss. Because the second access may be blocked during a power failure, software should do at least two accesses before relying on the data. The MVME162 provides jumpers (on J20) that allow either power source of the DS1210S to be connected to the VMEbus +5V STDBY pin or to one cell of the onboard battery. For example, the primary system backup source may be a battery connected to the VMEbus +5V STDBY pin and the secondary source may be the onboard battery. If the system source should fail or the board is removed from the chassis, the onboard battery takes over.

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