EMERSON 1C31129G04控制DCS系统
系统时钟系统时钟由振荡器驱动。下表定义了各种配置的时钟频率。实时时钟输入RTC时钟输入由控制和定时器PLD生成的1MHz时钟驱动。这为MC864xD PIC定时器提供了一个固定的时钟基准，软件可以将其用作已知的定时基准。4.13.3本地总线控制器时钟分频器本地总线控制器（LBC）时钟输出连接到PLD，但不由内部逻辑使用4.14复位控制逻辑MVME7100上有多个复位源。以下源生成板级重置： 通电 复位开关 看门狗计时器 系统控制寄存器（BRD_RST） VME总线重置板级硬重置为整个SBC生成重置，包括处理器、本地PCI/PCI-X总线、以太网PHY、串行端口、闪存设备和PLD。如果MVME7100被配置为VME系统控制器，VMEbus和本地Tsi148重置输入也被重置。4.15实时时钟电池有一个车载电池支架，可方便地更换+3.0V纽扣电池锂电池（BR2325），为车载实时时钟提供备用电源。蓄电池开关电路提供+3.3V和蓄电池电压之间的自动切换。
System Clock The system clock is driven by an oscillator. The following table defines the clock frequencies for various configurations.Real Time Clock Input The RTC clock input is driven by a 1MHz clock generated by the Control and Timers PLD. This provides a fixed clock reference for the MC864xD PIC timers which software can use as a known timing reference. 4.13.3 Local Bus Controller Clock Divisor The Local Bus Controller (LBC) clock output is connected to the PLD but is not used by the internal logic 4.14 Reset Control Logic There are multiple sources of reset on the MVME7100. The following sources generate a board level reset: Power-up Reset switch Watchdog timer System control register (BRD_RST) VMEbus reset A board level hard reset generates a reset for the entire SBC including the processor, local PCI/PCI-X buses, Ethernet PHYs, serial ports, flash devices, and PLD(s). If the MVME7100 is configured as the VME system controller, the VMEbus and local Tsi148 reset input are also reset. 4.15 Real Time Clock Battery There is an on-board battery holder that provides easy replacement of a +3.0V button cell lithium battery (BR2325) which provides back-up power to the on-board Real Time Clock. A battery switching circuit provides automatic switching between the +3.3V and battery voltages.
