GVC736BE101 5SXE06-0160机械设备卡件
两端正确端接。在控制器上，为P2适配器板或LCP2适配器板上的端子提供了插座。如果SCSI总线终止于适配器板，则必须在适配器板上安装终端电阻器+通过适配器板上的保险丝向SCSI总线TERM电源线和终端电阻器提供5V电源。功能描述http://www.mcg.mot.com/literature1-25 1本地资源MVME162FX嵌入式控制器包括用于本地处理器的许多资源。这些包括滴答计时器、软件可编程硬件中断、看门狗计时器和本地总线超时。可编程时钟提供六个分辨率为1µs的32位可编程时钟；VMEchip2中有两个，MC2芯片中有四个。滴答计时器可以被编程为向处理器产生周期性中断。有关详细编程信息，请参阅《MVME162FX嵌入式控制器程序员参考指南》中的VMEchip2和MC2芯片。看门狗定时器VMEchip2和MC2芯片中提供了看门狗定时器功能。当看门狗计时器启用时，必须在编程时间内由软件复位，否则超时。看门狗定时器可编程为在超时时生成SYSRESET信号、本地复位信号或板故障信号。有关详细编程信息，请参阅《MVME162FX嵌入式控制器程序员参考指南》中的VMEchip2和MC2芯片。看门狗定时器逻辑在VMEchip2和MC2芯片ASIC中复制。由于VMEchip2中的看门狗定时器功能是MC2芯片中该功能的超集（系统重置功能），因此除了不包含VMEbus接口的控制器版本（“无VMEbus界面”选项）外，VMEchif2中的定时器在所有情况下都使用。软件可编程硬件中断VMEchip2提供八个软件可编程的硬件中断。这些中断允许软件创建硬件中断。1-26计算机组文献中心网站板级硬件描述1本地总线超时MVME162FX嵌入式控制器在VMEchip2和MC2芯片中为本地总线提供超时功能。当定时器被启用并且本地总线访问超时时，传输错误确认（TEA）信号被发送到本地总线主控器。软件可选择8µsec、64µsec、256µsec或无限长的超时值。本地总线计时器在VMEbus绑定周期内不工作。VMEbus绑定周期由VMEbus访问计时器和VMEbus全局计时器计时。在VMEchip2和MC2芯片ASIC中复制访问定时器逻辑。由于VMEchip2中的本地总线计时器可以检测到非板外访问，而MC2芯片本地总线计时器无法检测到，因此除了不包含VMEbus接口的控制器版本（“No VMEbus interface option”）外，VMEcchip2中的计时器在所有情况下都使用。本地总线仲裁器本地总线仲裁程序实现固定优先级，如下表所述。表1-2。本地总线仲裁优先级设备优先级注释LAN 0最高IP DMA 1。。。SCSI 2。。。VMEbus 3下一个最低MC68040 4最低功能描述http://www.mcg.mot.com/literature1-27 1定时性能本节提供有关MVME162FX嵌入式控制器性能的信息。控制器设计为在25 MHz或32 MHz下工作。本地总线到DRAM周期时间DRAM基址、阵列大小和设备大小是可编程的。如果DRAM大小需要八个物理设备（即，当存储器阵列大小为4MB且DRAM技术为每个设备4M比特时），则DRAM控制器采用交错结构；
properly terminated at both ends. On the controller, sockets are provided for the terminators on the P2 adapter board or the LCP2 adapter board. If the SCSI bus ends at the adapter board, then termination resistors must be installed on the adapter board. +5V power to the SCSI bus TERM power line and termination resistors is provided through a fuse located on the adapter board. Functional Description http://www.mcg.mot.com/literature 1-25 1 Local Resources The MVME162FX Embedded Controller includes many resources for the local processor. These include tick timers, software-programmable hardware interrupts, watchdog timer, and local bus timeout. Programmable Tick Timers Six 32-bit programmable tick timers with a 1 µs resolution are provided; two in the VMEchip2 and four in the MC2 chip. The tick timers can be programmed to generate periodic interrupts to the processor. Refer to the VMEchip2 and MC2 chip in the MVME162FX Embedded Controller Programmer’s Reference Guide for detailed programming information. Watchdog Timer A watchdog timer function is provided in the VMEchip2 and the MC2 chip. When the watchdog timer is enabled, it must be reset by software within the programmed time or it times out. The watchdog timer can be programmed to generate a SYSRESET signal, local reset signal, or board fail signal if it times out. Refer to the VMEchip2 and the MC2 chip in the MVME162FX Embedded Controller Programmer’s Reference Guide for detailed programming information. The watchdog timer logic is duplicated in the VMEchip2 and MC2 chip ASICs. Because the watchdog timer function in the VMEchip2 is a superset of that function in the MC2 chip (system reset function), the timer in the VMEchip2 is used in all cases except for the version of the controller which does not include the VMEbus interface ("No VMEbus Interface" option). Software-Programmable Hardware Interrupts Eight software-programmable hardware interrupts are provided by the VMEchip2. These interrupts allow the software to create a hardware interrupt. 1-26 Computer Group Literature Center Web Site Board Level Hardware Description 1 Local Bus Timeout The MVME162FX Embedded Controller provides a timeout function in the VMEchip2 and the MC2 chip for the local bus. When the timer is enabled and a local bus access times out, a Transfer Error Acknowledge (TEA) signal is sent to the local bus master. The timeout value is selectable by software for 8 µsec, 64 µsec, 256 µsec, or infinity. The local bus timer does not operate during VMEbus bound cycles. VMEbus bound cycles are timed by the VMEbus access timer and the VMEbus global timer. The access timer logic is duplicated in the VMEchip2 and MC2 chip ASICs. Because the local bus timer in the VMEchip2 can detect an offboard access and the MC2 chip local bus timer cannot, the timer in the VMEchip2 is used in all cases except for the version of the controller which does not include the VMEbus interface ("No-VMEbus-Interface option"). Local Bus Arbiter The local bus arbiter implements a fixed priority which is described in the following table. Table 1-2. Local Bus Arbitration Priority Device Priority Note LAN 0 Highest IP DMA 1 ... SCSI 2 ... VMEbus 3 Next Lowest MC68040 4 Lowest Functional Description http://www.mcg.mot.com/literature 1-27 1 Timing Performance This section provides information on the performance of the MVME162FX Embedded Controller. The controller is designed to operate at 25 MHz or 32 MHz. Local Bus to DRAM Cycle Times The DRAM base address, array size, and device size are programmable. The DRAM controller assumes an interleaved architecture if the DRAM size requires eight physical devices (that is, when the memory array size is 4MB and DRAM technology is 4 Mbits per device;
