IS200IGDMH1AAA机器人备件
第章介绍了每个信道上的可选用户定义信号，称为用户信号。第10章用户信令。所有修订版表A-2 A版和B版之间的差异（续）更改位置影响ARM IHI 0033B。B版权所有ARM Limited或其附属公司。保留所有权利。词汇表-85 ID102715非保密词汇表本词汇表描述了AMBA 5 AHB文档中使用的一些技术术语。AHB一种AMBA总线协议，定义了系统组件之间的接口，包括主设备、互连设备和从设备。AMBA AHB支持高时钟频率、单时钟边沿操作、突发传输和非三态实现。它可以支持广泛的数据总线配置。另请参见AHB Lite。AHB Lite完整AMBA AHB协议规范的子集。它提供了大多数AMBA AHB从设备和主设备设计所需的所有基本功能，尤其是与多层AMBA互连一起使用时。对齐存储在一个地址的数据项，该地址可以完全被2的最高幂整除，2的最大幂整除的大小以字节为单位。因此，对齐的半字、字和双字的地址可以分别被2、4和8整除。APB用于辅助或通用外设（如定时器、中断控制器、UART和I/O端口）的AMBA总线协议。使用APB通过系统到外围总线桥连接到主系统总线可以帮助减少系统功耗。AXI AMBA总线协议，支持：•地址或控制和数据的单独阶段。•使用字节通道选通进行未对齐的数据传输。•仅发出起始地址的基于突发的事务。•独立的读写数据通道。•发出多个未完成地址。•无序交易完成。•可选增加寄存器级，以满足定时或重传要求。AXI协议包括用于低功率操作的可选信令扩展。词汇表词汇-86版权所有ARM Limited或其附属公司。保留所有权利。ARM IHI 0033B.b非机密ID102715 Beat突发内单个传输的替代术语。例如，在AMBA 5 AHB中，INCR4突发包括四个节拍。另请参见爆裂。一组到连续地址的传输。在AMBA协议中，脉冲串由指示脉冲串长度和地址如何递增的信号控制。另请参见Beat。双字64位数据项。在ARM系统中，双字通常至少是字对齐的。当数据结构存储在内存中时，确定数据结构中连续字节顺序的方案。另请参见小端序和大端序。半字16位数据项。在ARM系统中，半字通常是半字对齐的。处理器执行处理的实体的通用术语。Word 32位数据项。在ARM系统中，单词通常是对齐的。
chapter that describes the optional user defined signals on each channel called the User signals. Chapter 10 User Signaling. All revisions Table A-2 Differences between issue A and issue B (continued) Change Location Affects ARM IHI 0033B.b Copyright ARM Limited or its affiliates. All rights reserved. Glossary-85 ID102715 Non-Confidential Glossary This glossary describes some of the technical terms used in AMBA 5 AHB documentation. AHB An AMBA bus protocol that defines the interface between system components, including masters, interconnects, and slaves. AMBA AHB supports high clock frequency, single clock-edge operation, burst transfers, and non-tristate implementation. It can support wide data bus configurations. See also AHB-Lite. AHB-Lite A subset of the full AMBA AHB protocol specification. It provides all of the basic functions required by the majority of AMBA AHB slave and master designs, particularly when used with a multi-layer AMBA interconnect. Aligned A data item stored at an address that is exactly divisible by the highest power of 2 that divides exactly into its size in bytes. Aligned halfwords, words, and doublewords therefore have addresses that are divisible by 2, 4, and 8 respectively. APB An AMBA bus protocol for ancillary or general-purpose peripherals such as timers, interrupt controllers, UARTs, and I/O ports. Using APB to connect to the main system bus through a system-to-peripheral bus bridge can help reduce system power consumption. AXI An AMBA bus protocol that supports: • Separate phases for address or control and data. • Unaligned data transfers using byte lane strobes. • Burst-based transactions with only the start address issued. • Separate read and write data channels. • Issuing multiple outstanding addresses. • Out-of-order transaction completion. • Optional addition of register stages to meet timing or repropagation requirements. The AXI protocol includes optional signaling extensions for low-power operation. Glossary Glossary-86 Copyright ARM Limited or its affiliates. All rights reserved. ARM IHI 0033B.b Non-Confidential ID102715 Beat An alternative term for an individual transfer within a burst. For example, in AMBA 5 AHB, an INCR4 burst comprises four beats. See also Burst. Burst A group of transfers to consecutive addresses. In an AMBA protocol, a burst is controlled by signals that indicate the length of the burst and how the address is incremented. See also Beat. Doubleword A 64-bit data item. Doublewords are normally at least word-aligned in ARM systems. Endianness The scheme that determines the order of successive bytes of data in a data structure when that structure is stored in memory. See also Little-endian and Big-endian. Halfword A 16-bit data item. Halfwords are normally halfword-aligned in ARM systems. Processor A general term for an entity that performs processing. Word A 32-bit data item. Words are normally word-aligned in ARM systems.
