3BHB018162R0001工控备件
产品的eMMC技术
它是BGA中的嵌入式非易失性存储系统包。它具有高性能、低功耗特性，支持eMMC4.5、eMMC5.0和eMMC5.1规范。2产品列表3关键功能HS400总线速度模式 HS400模式具有以下特点-DDR数据采样方法-CLK频率高达200 MHz数据速率-高达200 MB/s-支持4或8位总线宽度-信号电平为1.8 V-读取操作的调谐概念 设备类型值（EXT_CSD寄存器：Device_type[196]）位设备类型支持性7 HS400双数据速率e•MMC@200 MHz-1.2V I/O不支持6 HS400双速率e•MMC@200 MHz-1.8V I/O支持5 HS200单数据速率e？MMC@200MHz-1.2V输入/输出不支持4 HS200单数据速率e•支持2个高速双数据速率e•MMC@52MHz-1.8V或3V I/O支持1个高速e•MMC@52MHz–额定设备电压支持0个高速e？MMC@26MHz–额定装置电压支持注：这在JEDEC中讨论，尚未确认。未来可根据JEDEC标准进行修改。零件号密度闪存型封装类型封装尺寸 8GB 64Gb MLCx1 FBGA153 11.5x13x1.0（mm） 扩展CSD修订版（EXT_CSD寄存器：EXT_CSD_REV[192]）值计时接口EXT_CSD寄存器值255–9保留-8修订版1.8（用于MMC v5.1）支持7修订版1.7（用于MMCV5.0）-6修订版1.6（用于MMC4.5、V4.51）-5修订版1.5（用于MMC5.41）-4修订版1.4（过时）-3修订版1.3（用于MMC3）-2修订版1.2（用于MMCV4.2）-1修订版1.1（用于MMV4.1）-0修订版1.0（适用于MMC V4.0）-注：JEDEC定义的当前e•MMC标准支持EXT_CSD_REV值最多为0x08。 高速定时值（EXT_CSD寄存器：HS_timing[185]）值定时接口支持性0x0选择向后兼容接口定时支持0x1高速支持0x2 HS200支持0x3 HS400支持
EMMC technology of products
It is an embedded nonvolatile storage system package in BGA. It has the characteristics of high performance and low power consumption, and supports eMMC4.5, eMMC5.0 and eMMC5.1 specifications. 2 Product list 3 Key functions HS400 bus speed mode • HS400 mode has the following characteristics - DDR data sampling method - CLK frequency up to 200 MHz data rate - up to 200 MB/s - support 4 or 8-bit bus width - signal level 1.8 V - tuning concept of read operation • device type value (EXT_CSD register: Device_type [196]) - bit device type supportability 7 HS400 dual data rate e • MMC@200 MHz-1.2V I/O does not support 6 HS400 dual rate e • MMC@200 MHz-1.8V I/O supports 5 HS200 single data rate e? MMC@200MHz-1.2V I/O does not support 4 HS200 single data rates e • supports 2 high-speed dual data rates e • MMC@52MHz-1.8V Or 3V I/O supports 1 high-speed e • MMC@52MHz – Rated equipment voltage supports 0 high-speed e? MMC@26MHz – Rated device voltage support Note: This is discussed in JEDEC and has not been confirmed. It can be modified according to JEDEC standards in the future. Part No. Density Flash memory package type Package size 8GB 64Gb MLCx1 FBGA153 11.5x13x1.0 (mm) • Extended CSD revision (EXT_CSD register: EXT_CSD_REV [192]) Value timing interface EXT_ CSD register values 255 – 9 reserved - 8 revision 1.8 (for MMC v5.1) support 7 revision 1.7 (for MMC v5.0) - 6 revision 1.6 (for MMC 4.5, V4.51) - 5 revision 1.5 (for MMC 5.41) - 4 revision 1.4 (obsolete) - 3 revision 1.3 (for MMC) - 2 revision 1.2 (for MMC 4.2) - 1 revision 1.1 (for MMC 4.1) - 0 revision 1.0 (for MMC V4.0) - Note: The current e • MMC standard defined by JEDEC supports EXT_ CSD_ The REV value can be up to 0x08. • High speed timing value (EXT_CSD register: HS_timing [185]) value Timing interface supportability 0x0 Select backward compatible interface Timing support 0x1 High speed support 0x2 HS200 support 0x3 HS400 support
