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MTL 8939-HN工业保护器
PCI BIOS函数调用可用的函数调用用于标识资源的位置和访问VMEbus接口的配置空间。特殊功能允许读取和在配置空间中写入单个字节、字和DWORD。PCI BIOS例程（对于16位和32位调用者）必须以适当的权限调用，以便可以启用/禁用中断，例程可以访问I/O空间。XVME-660中集成了软件可选字节交换硬件，以允许：对于Intel和Motorola字节排序方案之间的差异，允许轻松通过VMEbus进行通信。字节交换包包含多个缓冲区，用于直接传递数据或在传递数据字节时交换数据通过字节排序方案摩托罗拉系列处理器存储数据，最低有效字节位于最高地址和最低地址的最高有效字节。这是指作为大端总线，是VMEbus标准。英特尔系列处理器存储数据以相反的方式，最低有效字节位于最低地址，并且位于最高地址的最高有效字节。这被称为小端（或PCI）总线。这种基本差异如图4-1所示，其中显示了两种体系结构存储的32位量，从地址mt开始XVME-660包含一个通用芯片，该芯片在PCI总线（英特尔体系结构）和VMEbus（摩托罗拉体系结构）之间执行地址不变转换，以及字节交换硬件，以逆转通用芯片字节通道交换。
显示了PCI总线和VMEbus之间的地址不变转换。
请注意，PCI（英特尔）总线的内部数据存储方案与此不同VME（摩托罗拉）总线的。例如，存储字节78（最低有效字节）而字节78存储在PCI机器上的位置M+3VMEbus机器。因此，架构之间的数据总线连接必须映射的正确数字一致性或数据一致性是指XVME-660和VMEbus，其中上述字节排序方案为在16位或32位量的传输期间保持。数值一致性是通过将XVME-660缓冲区设置为直接传递数据来实现，这允许用于执行地址不变字节通道交换的Universe芯片。数值一致性用于传输整数数据、浮点数据、指针等长字值12345678h由XVME-660和VMEbus存储在地址M，如图4-3所示。由于通用芯片，数据必须直接通过字节交换传递硬件为此，在保持数值一致性的情况下，通过将闪存分页和字节交换寄存器（寄存器234h）的位6和7设置为设置为0（与非字节交换板相同）；参见第17页。也就是说，硬件字节交换被禁用，因此tundra数据不变量处于活动状态。
PCI BIOS Function Calls
The available function calls are used to identify the location of resources and to access
configuration space of the VMEbus interface. Special functions allow the reading and
writing of individual bytes, words, and dwords in the configuration space. PCI BIOS routines (for both 16- and 32-bit callers) must be invoked with appropriate privilege so that
interrupts can be enabled/disabled and the routines can access I/O space. Software selectable byte-swapping hardware is integrated into the XVME-660 to allow
for the difference between the Intel and Motorola byte-ordering schemes, allowing easy
communication over the VMEbus. The byte-swapping package incorporates several buffers either to pass data straight through or to swap the data bytes as they are passed
through. Byte-Ordering Schemes
The Motorola family of processors stores data with the least significant byte located at
the highest address and the most significant byte at the lowest address. This is referred to
as a big-endian bus and is the VMEbus standard. The Intel family of processors stores
data in the opposite way, with the least significant byte located at the lowest address and
the most significant byte located at the highest address. This is referred to as a little-endian (or PCI) bus. This fundamental difference is illustrated in Figure 4-1, which
shows a 32-bit quantity stored by both architectures, starting at address MThe XVME-660 contains a Universe chip that performs address-invariant translation between the PCI bus (Intel architecture) and the VMEbus (Motorola architecture), and
byte-swapping hardware to reverse the Universe chip byte-lane swapping. (Contact Tundra at www.tundra.com for a PDF version of the Universe manual.) Figure 4-2 shows address-invariant translation between a PCI bus and a VMEbus. Notice that the internal data storage scheme for the PCI (Intel) bus is different from that
of the VME (Motorola) bus. For example, the byte 78 (the least significant byte) is stored
at location M on the PCI machine while the byte 78 is stored at the location M+3 on the
VMEbus machine. Therefore, the data bus connections between the architectures must be
mapped correctlyNumeric consistency, or data consistency, refers to communications between the
XVME-660 and the VMEbus in which the byte-ordering scheme described above is
maintained during the transfer of a 16-bit or 32-bit quantity. Numeric consistency is
achieved by setting the XVME-660 buffers to pass data straight through, which allows
the Universe chip to perform address-invariant byte-lane swapping. Numeric consistency
is desirable for transferring integer data, floating-point data, pointers, etc. Consider the
long word value 12345678h stored at address M by both the XVME-660 and the VMEbus, as shown in Figure 4-3. Due to the Universe chip, the data must be passed straight through the byte-swapping
hardware. To do this, maintaining numeric consistency, enable the straight-through buffers by setting bits 6 and 7 of the Flash Paging and Byte Swap register (register 234h) both
to 0 (same as non-byte swap board); see p. 17. That is, hardware byte swapping is disabled, so tundra data invariation is active.
