EATON XVS-430-10MPI-1-10触摸屏
应用变量放在网段上的一组应用程序数据，可将其分组在一起在通信变量（COMV）中。协会
在网络配置工具中的设备配置之间创建的链接
以及硬件配置工具中描述的机架系统。
总线仲裁器
在每个FIP网络中，一个或多个FIP设备必须充当总线仲裁器。这个
总线仲裁器是控制FIP网络访问的设备。没有公共汽车
仲裁器：在FIP网络上不能交换数据。
总线接口单元
DIN导轨安装单元，将现场控制I/O模块连接至FIP总线。
总线控制器
FIP总线控制器是一个安装在机架上的PLC模块，将PLC连接到
FIP总线或总线。总线控制器状态位
总线控制器、网络和PLC参考表中的80位状态区域
信道状态数据。该状态区域的位置在硬件期间分配
总线控制器的配置。
总线扫描
FIP总线扫描涉及FIP宏周期的恒定重复。FIP
宏循环由FIP总线仲裁器执行。90-70系列FIP总线控制器
可以是FIP网络中的潜在总线仲裁器。宏循环由
基于远程设备配置的配置软件及其
相关的I/O模块和其他用户输入。
信道状态位
信道状态位是总线控制器状态位的位17-80。他们组成
32个潜在通信中的每一个的错误位和数据传输位
可以建立的信道。COMREQ
“通信请求”可包含在90-70系列PLC。定义了许多不同类型的COMREQ
90-70系列PLC。一些COMREQ可用于从PLC发送命令
CPU连接到FIP总线控制器。
COMREQ命令块
此结构包含有关要执行的FIP命令的信息。COMREQ状态字
系列90-70存储器中的选定区域，其中COMREQ的结果为：放置。
Application Variable
Set of application data put on the network segment which may be grouped together
in communication variables (COMVs).
Association
A link created between a device configuration in the Network Configuration Tool
and a rack system described in the Hardware Configuration Tool.
Bus Arbiter
In every FIP Network, one or more of the FIP devices must act as Bus Arbiter. The
Bus Arbiter is the device that controls access to the FIP Network. Without a Bus
Arbiter no data can be exchanged on a FIP Network.
Bus Interface Unit
A DIN-rail mounted unit that interfaces Field Control I/O modules to a FIP bus.
Bus Controller
The FIP Bus Controller is a rack-mounted PLC module that interfaces the PLC to a
FIP bus or busses.Bus Controller Status Bits
An 80-bit status area in the PLC reference table for Bus Controller, network, and
channel status data. The location of this status area is assigned during hardware
configuration of the Bus Controller.
Bus Scan
The FIP Bus Scan involves the constant repetition of the FIP macrocycle. The FIP
macrocycle is executed by the FIP Bus Arbiter. The Series 90-70 FIP Bus Controller
may be a potential Bus Arbiter in a FIP network. The macrocycle is generated by the
configuration software based on the configuration of the remote devices and their
associated I/O modules, and other user input.
Channel Status Bits
The Channel Status bits are bits 17-80 of the Bus Controller Status Bits. They consist
of an error bit and a data transfer bit for each of the 32 potential communications
channels that can be established.
COMREQ
A “Communications Request” that can be included in the application program of the
Series 90-70 PLC. Many different types of COMREQs have been defined for the
Series 90-70 PLC. Some COMREQs can be used to send commands from the PLC
CPU to the FIP Bus Controller.
COMREQ Command Block
This structure contains information about the FIP command to be executed.
COMREQ Status Word
A selected area in Series 90-70 memory where the results of the COMREQ are
placed.
