3BSE018295R1运动控制卡件
FIP网络、FIP总线控制器和PLC之间的I/O数据交换
CPU通过FIP总线控制器的双端口存储器进行。双端口存储器中的数据
以支持FIP的各种扫描操作所需的方式组总线控制器和PLC CPU。
下图显示了FBC双端口中I/O数据的排列内存和数据流的方向。每个输入和输出区域细分为在PLC CPU和FIP总线控制器应用传输变量（TVAs）之间配置的单个扫描集
FIP总线控制器和网络之间交换的I/O数据包括：应用程序传输变量（TVA），如图底部所示。
有两种类型的TVA，数据TVA和验证程序TVA
数据TVA包括输入数据TVA（包括状态、抖动和专用
报警数据）和输出数据TVAs（包括状态和闪烁数据）；
验证程序TVA包括离散输入验证程序（每点1位）和模拟输入验证器（每个通道1字节）；
I/O模块的所有TVA（数据和验证器）自动放置在同一位置COMV。FBC存储器的离散和模拟输入数据区
FBC双端口存储器的该区域包含每个配置的输入应用程序传输变量（TVA）。FIP总线控制器放置消耗的数据TVA，包括状态、振颤和专用报警数据，直接输入其存储器的I/O数据区。
这是随后将映射到PLC的%I和%AI参考的数据桌子。如果无法从网络中使用数据TVA，通常是因为快速或刷新，FIP总线控制器将数据默认为0或保持最后状态）。
FBC存储器的输入点、故障触点和报警数据区该区域包含与输入数据相关的验证程序TVA。PLC使用验证器
驱动与离散点相关的点故障触点状态的信息，以及模拟信道。PLC还使用该信息驱动任何高报警和低报警与一些模拟输入相关的触点。每个都有一个位点故障触点离散输入位。包含点故障和报警故障触点的单个字节为：存在于每个模拟输入通道。
FIP总线控制器在该区域中成功放置已消费的验证程序TVA，无需修改如果验证器TVA无法使用，通常是由于缺乏及时性或刷新时，FBC仅设置影响离散和模拟数据。模拟TVA的剩余位保持其最后状态。因此，如果有报警触点位已设置，如果验证器TVA不再被使用，则保持设置。
The exchange of I/O data among the FIP network, the FIP Bus Controller and the PLC
CPU occurs via the FIP Bus Controller’s dual–port memory. Data in dual–port memory
is organized in a manner necessary to support the various scanning operations of the FIP
Bus Controller and PLC CPU.
The following diagram shows the arrangement of the I/O data in the FBC dual– port
memory and the direction of data flow. Each input and output area is subdivided into the
individual scan sets configured between the PLC CPU and the FIP Bus Controller Application Transfer Variables (TVAs)
I/O data in the exchanged between the FIP Bus Controller and the network consists of
application transfer variables (TVAs), as shown at the bottom of the diagram.
There are two types of TVAs, data TVAs and validator TVAs..
Data TVAs—consist of input data TVAs (including state, chatter, and specialized
alarm data) and output data TVAs (including state and blink data);
Validator TVAs—consist of discrete input validators (1 bit per point) and analog
input validators (1 byte per channel);
All TVAs (data and validators) of an I/O module are automatically placed in the same
COMV.Discrete and Analog Input Data Area of FBC Memory
This area of the FBC’s dual-port memory contains each configured input application
transfer variable (TVA). The FIP Bus Controller places consumed data TVAs, including
state, chatter, and specialized alarm data, directly into this I/O data area of its memory.
This is the data that will subsequently be mapped to the PLC’s %I and %AI reference
tables. If a data TVA cannot be consumed from the network, usually for lack of
promptness or refreshment, the FIP Bus Controller defaults the data (to 0 or to hold its
last state) according to its configuration.
Input Point Fault Contacts and Alarm Data Area of FBC Memory
This area contains validator TVAs associated with input data. The PLC uses validator
information to drive the states of point fault contacts associated with discrete points and
analog channels. The PLC also uses this information to drive any high and low alarm
contacts associated with some analog inputs. There is a bit point fault contact for each
discrete input bit. A single byte containing the point fault and alarm fault contacts is
present for each analog input channel.
The FIP Bus Controller places successfully consumed validator TVAs in this area without
modification. If a validator TVA cannot be consumed, usually for lack of promptness or
refreshment, the FBC sets only the bit that affects the point fault contact for the discrete and
analog data. The remaining bits of the analog TVA hold their last state. Therefore, if any
alarm contact bit is set, it remains set if the validator TVA can no longer be consumed.
