AS-P892-000电源模块,使用数量
中止开关（S1）当由软件激活时，中止开关可以生成中断从基板到处理器的信号处于用户可编程水平。中断通常用于中止程序执行并返回控制MVME2603/2604 ROM中的调试器固件和闪存。中断信号通过以下途径到达处理器模块：ISA总线中断线IRQ8∗. 该信号也可在的引脚PB7处获得Z8536 CIO设备，处理各种状态信号、串行输入/输出线，和计数器。
AS-P892-000电源模块连接到中止开关的断路器是一个边缘敏感电路，过滤以消除开关反弹。复位开关（S2）重置开关重置所有车载设备；它还驱动系统重置∗如果MVME2603/2604是系统控制器，则发出信号。Universe ASIC包括全局和局部复位驱动器。什么时候Universe作为VMEbus系统控制器、重置驱动程序运行通过断言VMEbus信号SYSRESET来提供全局系统重置∗.系统重置∗ 信号可能由复位开关产生，通电重置、看门狗超时或通过杂项控件中的控制位在Universe ASIC中注册（MISC\U CTL）。系统重置∗ 保留声明按照VMEbus规范的要求，至少持续200毫秒。类似地，Universe ASIC将输入信号和控制位提供给启动本地重置操作。通过设置控制位，软件可以将电路板保持在重置状态，禁止故障电路板参与在正常系统操作中。即使在以下情况下，也会启用本地重置驱动程序通用ASIC不是系统控制器。可能会产生局部重置通过重置开关、通电重置、看门狗超时、VMEbus系统重置∗, 或MISC\U CTL寄存器中的控制位。前面板指示灯（DS1–DS6）MVME2603/2604前面板上有六个LED：CHS、BFL、CPU、，PCI、FUS和SYS。
❏ CHS（DS1，黄色）。检查停止；由MPC603/604状态驱动MVME2603/2604上的线路。当停止条件从检测到处理器。
❏ BFL（DS2，黄色）。电路板故障；BRD故障时亮起∗ 信号线路处于活动状态。
❏ CPU（DS3，绿色）。CPU活动；DBB时亮起∗ （数据总线忙）处理器总线上的信号线处于活动状态。❏ PCI（DS4，绿色）。PCI活动；当IRDY∗ （发起人就绪）PCI总线上的信号线处于活动状态。这表明PCI夹层（如果已安装）处于活动状态。
❏ FUS（DS5，绿色）。保险丝正常；+5V DC、+12V DC和–从基板到过渡电路提供12V直流电源模块和远程设备。
ABORT Switch (S1)
When activated by software, the ABORT switch can generate an interrupt
signal from the base board to the processor at a user-programmable level.
The interrupt is normally used to abort program execution and return
control to the debugger firmware located in the MVME2603/2604 ROM
and Flash memory. The interrupt signal reaches the processor module via
ISA bus interrupt line IRQ8∗. The signal is also available at pin PB7 of the
Z8536 CIO device, which handles various status signals, serial I/O lines,
and counters.
The interrupter connected to the ABORT switch is an edge-sensitive circuit,
filtered to remove switch bounce.
RESET Switch (S2)
The RESET switch resets all onboard devices; it also drives a SYSRESET∗
signal if the MVME2603/2604 is the system controller.
The Universe ASIC includes both a global and a local reset driver. When
the Universe operates as the VMEbus system controller, the reset driver
provides a global system reset by asserting the VMEbus signal SYSRESET∗.
A SYSRESET∗ signal may be generated by the RESET switch, a power-up
reset, a watchdog timeout, or by a control bit in the Miscellaneous Control
Register (MISC_CTL) in the Universe ASIC. SYSRESET∗ remains asserted
for at least 200 ms, as required by the VMEbus specification.
Similarly, the Universe ASIC supplies an input signal and a control bit to
initiate a local reset operation. By setting a control bit, software can
maintain a board in a reset state, disabling a faulty board from participating
in normal system operation. The local reset driver is enabled even when
the Universe ASIC is not system controller. Local resets may be generated
by the RESET switch, a power-up reset, a watchdog timeout, a VMEbus
SYSRESET∗, or a control bit in the MISC_CTL register.Front Panel Indicators (DS1 – DS6)
There are six LEDs on the MVME2603/2604 front panel: CHS, BFL, CPU,
PCI, FUS, and SYS.
❏ CHS (DS1, yellow). Checkstop; driven by the MPC603/604 status
lines on the MVME2603/2604. Lights when a halt condition from
the processor is detected.
❏ BFL (DS2, yellow). Board Failure; lights when the BRDFAIL∗ signal
line is active.
❏ CPU (DS3, green). CPU activity; lights when the DBB∗ (Data Bus
Busy) signal line on the processor bus is active.
❏ PCI (DS4, green). PCI activity; lights when the IRDY∗ (Initiator
Ready) signal line on the PCI bus is active. This indicates that the
PCI mezzanine (if installed) is active.
❏ FUS (DS5, green). Fuse OK; lights when +5V DC, +12V DC, and
–12V DC power is available from the base board to the transition
module and remote devices.
